1. Field of the Invention
The present invention relates to a method for fabricating an IC board, and more particularly to a method for fabricating an IC board without a ring structure.
2. The Prior Arts
As the trend for electronic products to become lighter, smaller, and thinner continues, adding to the never ending additions in functionalities, the I/O ports of semiconductor chips are being led to increase rapidly. Correspondingly, the chip packaging technologies are also continuously updated. Nowadays in high-end IC products, the Flip Chip technique has been adopted to reduce the package size and to squeeze into more circuits on an IC board. The chip fabrication technology has been improved from 90 nm rapidly to 65 nm, and even all the way to 45 nm production capability. At the same time, the conductive lines on the IC board have become thinner. The conductive line is narrowed down rapidly from 50 μm to 20 μm (pitch 40 μm), and even 15 μm (pitch 30 μm) has been suggested.
In the IC board fabrication process, the substrate build up process is usually utilized to form each layer; and laser via hole or through hole drilling and copper electroplating method are used for achieving the goal of coupling various different separate layers. Under typical design criteria, the metal capture ring is designed around the laser via holes or through holes for accomplishing the following: (1) to prevent insufficient thickness and broken circuit caused by the attacking of the copper inside the laser via holes by the etchant during the etching process; (2) during the performing of pattern plating, a sufficient distance is provided to the laser via holes for preventing the covering of the via holes by the photoresist to negatively affect plating capability.
Therefore, under consideration of the above restrictions, designers require to take into consideration of alignment capability during the fabrication for determining the dimensions of the capture ring. However, in regards to the tiny pitch ring for through holes applications, the reduction in the size of the single side of the ring from 25 μm to 15 μm becomes a much more difficult challenge to overcome.
Under conventional design technique, the method is based on the reduction of the ring size to obtain a narrower conductive trace pitch for increasing the layout density, increasing the line width, or decreasing the substrate size and the build-up layer. However, because the manufacturing equipment would possess a certain amount of tolerance in the alignment of the manufacturing equipment, the designer is subjected to design limitations in regards to the reduction of the size of the ring. The acknowledged conventional design rule of the IC board is to be about 50 μm for one-side of the metal ring. This aforementioned size still occupies quite a substantial amount of limited space as well as putting a constraint on the layout design. Even though advancements in alignment accuracy of manufacturing equipment or in the more complicated manufacturing techniques can reduce ring size, high capital expenditure and manufacturing costs would correspondingly be the price to be paid.
For the reasons stated above, and for other reasons stated below, several researchers have proposed the ringless design for breaking through conventional design thinking. As a result, the ringless structural design is applied in improved layout designs by disregarding the laser via holes ring issues, and is thus able to reduce the footprint, increase the layout density, and reduce the design layout difficulties. In addition, because of the thinning width of the conductive line, the adhesion between the conductive lines and the substrate material is dramatically decreased, and becomes a major challenge to product reliability. Hence the new IC board structure and fabrication method will become apparent to those skilled in the art to be addressing these issues.